Wireless communication systems are widely deployed to provide various types of communications such as voice and data. One such system is wide band code division multiple access WCDMA, which has been adopted in various competing wireless communication standards, for example third generation partnership project 3GPP, 3GPP project 2 (3GPP2) and long term evolution 3GPP (LTE 3GPP).
To overcome data corruption that can occur during RF transmission the different wireless communication standards typically include some form of channel coding, where one common channel coding technique is turbo coding.
Turbo coding involves the use of a turbo encoder for encoding a code segment (i.e. a data packet) and a turbo decoder for the decoding of the encoded code segment. A turbo encoder typically includes a pair of convolutional encoders, one of which receives information bits (i.e. systematic bits) while the other convolutional encoder receives interleaved information bits. The information bits are shuffled (interleaved) in accordance with a specified interleaving scheme. The pair of convolutional encoders output two sequences of parity bits that are modulated and transmitted to a receiver. The systematic bits are also modulated and transmitted to the receiver.
Turbo decoding is performed by an iterative process in which so called extrinsic information elements are exchanged between sub-blocks (also referred to as a processing units) of the turbo decoder. Extrinsic information elements are stored in multiple memory banks and form a block of a certain size (K). Each processing unit can apply a soft input soft output algorithm. In order to utilize multiple sub-blocks in an efficient manner the processing units should operate in a parallel contention free manner.
Various single access contention free interleavers were developed. A single access contention free interleaver can prevent contentions if each processing unit fetches, during a single fetch cycle, a single extrinsic information element. 3GPP LTE interleavers applies the following interleaving function: phi(x)=(f1*x+f2*x2)modulo(K), whereas f1 and f2 are set in response to the value of K, phi(x) is an interleaved output value, K is the number of information elements in an information block and x is an non-interleaved value that can be a non-interleaved address. The interleaved output value (phi(x)) is responsive to the squared value of variable x. Calculating the squared value of x requires an area-consuming multiplier. In devices that include multiple interleavers an inclusion of a dedicated multiplier in each interleaver results in larger area penalties. This area penalty is associated with increased cost and increased power consumption.
There is a need to simplify the implementation of an interleaver, especially when a single device includes multiple interleavers.